Altera Avalon Verification IP Suite Manuel d'utilisateur Page 24

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Timing
The following timing diagram illustrates the sequence of events for an Avalon-MM Master BFM. The Master
BFM drives interleaved writes and reads when the readdatavalid signal is present. This diagram serves as
a reference for the following discussion of API and events.
Figure 5-2: Avalon-MM Master Driving Interleaved Write and Read Transactions
Avalon-MM Master BFM
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Timing
5-2
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