Altera Avalon Verification IP Suite Manuel d'utilisateur télécharger pdf (Page 103)

get_response_address()

bit [AV_ADDRESS_W-1:0] get_response_address()Prototype:

Verilog HDL: None

VHDL: response_address, bfm_id, req_if(bfm_id)

Arguments:

bit[AV_ADDRESS_W-1:0]Returns:

Returns the transaction address in the response descriptor that has been

removed from the response queue.

Description:

Verilog HDL, VHDLLanguage support:

get_response_byte_enable()

bit [AV_NUMSYMBOLS-1:0] get_response_byte_enable(int index)Prototype:

Verilog HDL: index

VHDL: response_byte_enable, index, bfm_id, req_if(bfm_id)

Arguments:

bit[AV_NUMSYMBOLS-1:0]Returns:

Returns the value of the byte enables in the response descriptor that has been

removed from the response queue. Each cycle of a burst response is addressed

individually by the specified index.

Description:

Verilog HDL, VHDLLanguage support:

get_response_burst_size()

bit [AV_BURSTCOUNT_W-1:0]get_response_burst_size()Prototype:

Verilog HDL: None

VHDL: response_burst_size, bfm_id, req_if(bfm_id)

Arguments:

bit[AV_BURSTCOUNT_W-1:0]Returns:

Returns the size of the response transaction burst count in the response

descriptor that has been removed from the response queue.

Description:

Verilog HDL, VHDLLanguage support:

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get_response_address()

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Altera Avalon Verification IP Suite Manuel d'utilisateur Page 103