Altera Avalon Verification IP Suite Manuel d'utilisateur télécharger pdf (Page 132)

get_transaction_idles()

get_transaction_idles()Prototype:

Verilog HDL: None

VHDL: transaction_idles,bfm_id, req_if(bfm_id)

Arguments:

bit[31:0]Returns:

Returns the number of idle cycles in the most recently removed transaction.Description:

Verilog HDL, VHDLLanguage support:

get_transaction_eop()

get_transaction_eop()Prototype:

Verilog HDL: None

VHDL: transaction_eop, bfm_id, req_if(bfm_id)

Arguments:

bitReturns:

Returns the transaction end of packet status in the most recently removed

transaction.

Description:

Verilog HDL, VHDLLanguage support:

get_transaction_empty()

get_transaction_empty()Prototype:

Verilog HDL: None

VHDL: transaction_empty, bfm_id, req_if(bfm_id)

Arguments:

STEmpty_tReturns:

Returns the number of empty symbols in the most recently removed transaction.Description:

Verilog HDL, VHDLLanguage support:

Avalon-ST Sink BFM

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Altera Avalon Verification IP Suite Manuel d'utilisateur Page 132