Altera Avalon Verification IP Suite Manuel d'utilisateur télécharger pdf (Page 139)

Avalon-ST Monitor Assertion Checking API

Assertion checking methods enable and disable protocol assertions to ensure protocol compliance. For

example, the enable_a_no_data_outside_packet method enables the assertion that verifies that no data

is transmitted between the assertion of the endofpacket and the next startofpacket signals. If a violation

is found, an error message is displayed on the console running the simulation. Error flags also are displayed

in the waveform viewer.

By default all assertions are enabled. However, depending on the parameterization of a the Avalon-ST

interface, some assertions are automatically disabled. In some circumstances, you may want to disable

assertion checking. For example, when injecting protocol errors to test error handling, you may want to

disable assertion checking.

The names of all methods that implement assertions begin with set_enable_a. By default, if your testbench

includes the Avalon-ST monitor, the checking function is enabled. You can disable checking with the

DISABLE_ALTERA_AVALON_SIM_SVA macro.

set_enable_a_empty_legal()

set_enable_a_empty_legal()Prototype:

Verilog HDL: Boolean

VHDL: N.A.

Arguments:

voidReturns:

Enables an assertion that ensures empty is 0 except when endofpacket is

asserted and that empty is always less than the number of symbols in a packet.

Description:

Verilog HDLLanguage support:

set_enable_a_less_than_max_channel()

set_enable_a_less_than_max_channel()Prototype:

Verilog HDL: Boolean

VHDL: N.A.

Arguments:

voidReturns:

Enables an assertion that ensures that the value of the channel signal is less

than the maximum number of channels.

Description:

Verilog HDLLanguage support:

Altera Corporation

Avalon-ST Monitor

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Altera Avalon Verification IP Suite Manuel d'utilisateur Page 139