Altera Avalon Verification IP Suite Manuel d'utilisateur télécharger pdf (Page 119)

get_response_queue_size()

get_response_queue_size()Prototype:

Verilog HDL: None

VHDL: response_queue_size, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Returns the number of transactions in the response queues.Description:

Verilog HDL, VHDLLanguage support:

get_src_ready()

get_src_ready()Prototype:

Verilog HDL: None

VHDL: src_ready, bfm_id, req_if(bfm_id)

Arguments:

bitReturns:

Returns the value of the source ready port.Description:

Verilog HDL, VHDLLanguage support:

get_src_transaction_complete()

get_src_transaction_complete()Prototype:

Verilog HDL: None

VHDL: src_transaction_complete, bfm_id, req_if(bfm_id)

Arguments:

bitReturns:

Returns the transaction complete status.Description:

Verilog HDL, VHDLLanguage support:

get_transaction_queue_size()

get_transaction_queue_size()Prototype:

Verilog HDL: None

VHDL: transaction_queue_size, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Returns the number of transactions in the local queues.Description:

Verilog HDL, VHDLLanguage support:

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Avalon-ST Source BFM

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Altera Avalon Verification IP Suite Manuel d'utilisateur Page 119