Altera High-Speed Development Kit, Stratix GX Edition Manuel d'utilisateur Page 76
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Noté. / 5. Basé sur avis des utilisateurs
5–32 Quartus II Version 3.0 Altera Corporation
Nios-Based Tests High-Speed Development Kit, Stratix GX Edition User Guide
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nios-run: Terminal mode (Control-C exits)
-----------------------------------------
Reinitializing...
[lan91c111] nr_lan91c111_reset: chip id = SMC91C11xFD
[lan91c111] r_lan91c111_detect_phy: found lan83C183 (lan91C111 internal)
[lan91c111] r_lan91c111_init_phy: phy negotiation timed out
[lan91c111] r_lan91c111_init_phy: 10bt
[lan91c111] r_lan91c111_init_phy: half duplex
[dhcp] 1 timing out
[dhcp] 2 timing out
[dhcp] 3 timing out
[dhcp] 4 timing out
[dhcp] 5 timing out
[dhcp] 6 timing out
[dhcp] 7 timing out
[dhcp] 8 timing out
[dhcp] 9 timing out
[dhcp] 10 timing out
[dhcp] 11 timing out
[dhcp] 12 timing out
11. Press reset (Stratix_PB_0) to stop the test.
12. Press Cntrl + C in the shell to exit the test program.
13. If this test passes, write the word “PASS” in the column under
Stratix in the row Stratix Nios PROTO1 I/O in the worksheet.
Compact Flash Interface (Stratix Nios Compact Flash)
For this test, perform the following steps.
1. Verify that the serial cable is still attached to the Stratix RS-232
connector (top connector).
2. Make sure that the compact flash card is inserted. See Figure 5–24.
- High-Speed Development Kit 1
- Stratix GX Edition 1
- User Guide 1
- Contents 3
- Section III. Diagnostic Tests 4
- About this User Guide 7
- Typographic 8
- Conventions 8
- Section I. Introduction 9
- Preliminary 10
- 1. About this Kit 11
- Features 12
- Documentation 13
- July 2003 14
- Section II. Getting Started 15
- 2. Before You Begin 17
- Inspect the 18
- Software 18
- Requirements 18
- Set Up Licensing 20
- Next Steps 20
- 3. Board Setup 23
- Feature Description 24
- Required 25
- Hardware 25
- Power Up the 25
- Board & View 25
- 4. Run the Preloaded 29
- Diagnostic Tests 29
- Required Hardware 30
- Test Setup 30
- Run the User I/O Test 31
- Stratix GX DDR 33
- Interface 33
- Stratix GX HM 36
- Zd SPI-4.2 36
- Loopback 36
- Zd XCVR 38
- ● LED5 is the error signal 39
- Stratix GX SFP 40
- XCVR Loopback 40
- Stratix GX XCVR 42
- Eye Diagram 42
- Section III. Diagnostic 43
- 5. Perform the Production 45
- Figure 5–9 50
- Perform the 54
- Standard Tests 54
- Stratix GX-to-Stratix Bridge 56
- ● LED4 is turned off 60
- XCVR) (GX40 Device Only) 65
- Nios-Based 66
- Nios PROTO1 IO) 73
- Finishing Test & 79
- Breakdown 79
- 6. Troubleshooting 81
- 7. Diagnostic Test Details 83
- Stratix GX 91
- Stratix GX HM-Zd (SPI-4.2) 94
- Stratix GX SMA DPA 97
- Stratix GX SMA XCVR 101
- Stratix GX HM-Zd XCVR 105
- Stratix GX SFP XCVR 108
- Stratix GX XPAK XCVR 111
- Stratix GX HSSDC2 XCVR 114
- Nios Designs 117
- Stratix GX Device 118
- Stratix Nios PMC Test 120
- Section IV 127
- Demonstrations 127
- 8. Stratix GX SPI-4.2 129
- Demonstration with 10-Port 129
- Gigabit Ethernet MAC 129
- Intel Board (IXD1110) 131
- Altera Board 131
- 9. 10-Gigabit Ethernet MAC 135
- Demonstration 135
- Altera Board 136
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