Altera High-Speed Development Kit, Stratix GX Edition Manuel d'utilisateur Page 12
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1–2 Quartus II Version 3.0 Altera Corporation
July 2003
Features High-Speed Development Kit, Stratix GX Edition User Guide
The development kit includes the following items:
■ Stratix GX Development Board—The development board has a variety
of connectors from the Stratix GX device to external sources that you
can use for a wide array of applications, including Gigabit Ethernet,
10 Gigabit Ethernet, OC-12/STM-4 and OC-48/STM-16
SONET/SDH, Fibre Channel (1 and 2 Gbps), System Packet Interface
– Level 4 Phase 2 (SPI-4.2) (also known as POS-PHY Level 4), PCI
Express, 8-bit RapidIO, and 1x/4x Serial RapidIO. You can use a
Nios
®
embedded processor to control the application, or you can
access an external processor via the PCI mezzanine card (PMC)
interface.
■ Board Design Files—The kit includes a complete package of schematic
and layout design files along with a viewer tool, which you can use
as reference to accelerate PCB design using the Stratix GX device.
■ Design Examples—The kit includes design examples that illustrate the
use of Stratix GX transceivers. You can use these design examples as
a reference when implementing your proprietary backplane
interface, accelerating the design, verification, and prototyping cycle.
■ Demonstrations—The kit includes two device programming files that
demonstrate a 10 Gigabit Ethernet MAC with a 10 Gigabit
attachment unit interface (XAUI) and a SPI-4.2 interface connected to
a 10-port multi-physical layer (PHY) device.
■ Loopback Connectors—The kit includes 2 cards with reciprocal source-
synchronous connectors wired for external loopback mode and 1
card for XCVR loopback. Additionally, the kit includes 4 loopback
cards for the SFP connectors.
■ Cables—The kit includes 4 SMA cables that you can use to connect to
an external oscilloscope or use for loopback testing of quad-channel
transceiver interfaces such as XAUI.
Features
■ Supports a wide array of applications, including:
● Gigabit and 10 Gigabit Ethernet
● 1 and 2 Gbps Fibre Channel
● OC-12/STM-4 and OC-48/STM-16 SONET/SDH
● SPI-4.2
● SDI
● PCI Express
● 8-bit RapidIO and 1x/4x Serial RapidIO
● PCI
● Proprietary backplane
- High-Speed Development Kit 1
- Stratix GX Edition 1
- User Guide 1
- Contents 3
- Section III. Diagnostic Tests 4
- About this User Guide 7
- Typographic 8
- Conventions 8
- Section I. Introduction 9
- Preliminary 10
- 1. About this Kit 11
- Features 12
- Documentation 13
- July 2003 14
- Section II. Getting Started 15
- 2. Before You Begin 17
- Inspect the 18
- Software 18
- Requirements 18
- Set Up Licensing 20
- Next Steps 20
- 3. Board Setup 23
- Feature Description 24
- Required 25
- Hardware 25
- Power Up the 25
- Board & View 25
- 4. Run the Preloaded 29
- Diagnostic Tests 29
- Required Hardware 30
- Test Setup 30
- Run the User I/O Test 31
- Stratix GX DDR 33
- Interface 33
- Stratix GX HM 36
- Zd SPI-4.2 36
- Loopback 36
- Zd XCVR 38
- ● LED5 is the error signal 39
- Stratix GX SFP 40
- XCVR Loopback 40
- Stratix GX XCVR 42
- Eye Diagram 42
- Section III. Diagnostic 43
- 5. Perform the Production 45
- Figure 5–9 50
- Perform the 54
- Standard Tests 54
- Stratix GX-to-Stratix Bridge 56
- ● LED4 is turned off 60
- XCVR) (GX40 Device Only) 65
- Nios-Based 66
- Nios PROTO1 IO) 73
- Finishing Test & 79
- Breakdown 79
- 6. Troubleshooting 81
- 7. Diagnostic Test Details 83
- Stratix GX 91
- Stratix GX HM-Zd (SPI-4.2) 94
- Stratix GX SMA DPA 97
- Stratix GX SMA XCVR 101
- Stratix GX HM-Zd XCVR 105
- Stratix GX SFP XCVR 108
- Stratix GX XPAK XCVR 111
- Stratix GX HSSDC2 XCVR 114
- Nios Designs 117
- Stratix GX Device 118
- Stratix Nios PMC Test 120
- Section IV 127
- Demonstrations 127
- 8. Stratix GX SPI-4.2 129
- Demonstration with 10-Port 129
- Gigabit Ethernet MAC 129
- Intel Board (IXD1110) 131
- Altera Board 131
- 9. 10-Gigabit Ethernet MAC 135
- Demonstration 135
- Altera Board 136
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