Altera Stratix GX Transceiver Manuel d'utilisateur Page 278

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9–52 Altera Corporation
Stratix GX Transceiver User Guide January 2005
Recommended Resets
always @(posedge rx_clkout or posedge async_reset)
if(async_reset)
begin
rxdigitalreset_rx_clkout_Q <= 1'b1;
rxdigitalreset <= 1'b1;
end
else
begin
if(receive_digitalreset)
begin
rxdigitalreset_rx_clkout_Q <= 1'b1;
rxdigitalreset <= 1'b1;
end
else
begin
rxdigitalreset_rx_clkout_Q <=
rxdigitalreset_rx_cruclk;
rxdigitalreset <=
rxdigitalreset_rx_clkout_Q;
end
end
endmodule
Transmitter Reset
The configurations and design examples in this section show how to
implement a reset sequence for the transmitter channels. In this
configuration, GXB is configured only as a transmitter. In the design
examples, the tx_coreclk option is not shown because the reset signals
(txdigitalreset) based on tx_coreclk are synchronized internally
by the reset controller in the Stratix GX hard IP. This configuration only
demonstrates the reset sequence. You might want to add additional
escape states and other system-specific features in your design. If your
design requirements are different from the design example, you can make
necessary changes, using the flow chart and waveform figures in each
section as guidelines.
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