Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur télécharger pdf (Page 651)

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VHDL Tutorials

Verifying a Master DUT

Mentor VIP AE AXI3/4 User Guide, V10.2b

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September 2013

Figure 11-3. Slave Test Program Advanced API Tasks

The process write code extract demonstrates how to create and process multiple write

transactions. Each write transaction has a unique transaction_id number associated with it that

increments for each new transaction. A write_trans variable is defined to hold this

transaction_id.

The processing of write transactions initially configures the maximum number of outstanding

write transactions that can exist. An ACLK period after the ARESETn signal is inactive starts a

loop to create a slave transaction for the BFM indexed by the index argument. In the loop, the

delay for the AWREADY signal is set by the set_write_address_ready_delay procedure and then

it waits for a write address phase to occur using the get_write_addr_phase procedure. The

transaction record is then pushed onto a transaction queue with its unique write_trans

transaction index and queue identifier AXI_QUEUE_ID_0 by the push_transaction_id

procedure.

The loop then completes and starts again by creating a new transaction and waiting for another

write address phase to occur (refer to Example 11-25).

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