Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur télécharger pdf (Page 167)

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101

SystemVerilog Tutorials

Verifying a Slave DUT

Mentor VIP AE AXI3/4 User Guide, V10.2b

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September 2013

In the complete Master Test Program, three subsequent read transactions are created and

executed in a similar manner to that shown in Example 6-12. See SystemVerilog AXI4 Master

BFM Test Program listing for details.

Write Burst Transaction Creation and Execution

The code excerpt in Example 6-13 calls the create_write_transaction() function to create a

write burst transaction trans by providing the start address and burst length arguments. The

actual length of the burst on the protocol signals is 7+1=8.

Note

The burst length argument passed to the create_write_transaction() function is 1 less than

the number of transfers (beats) in the burst. This aligns the burst length argument value

with the value placed on the AWLEN protocol signals.

The set_data_words() function is then called eight times to set the data_words field of the write

transaction for each beat of the data burst. For this write transaction all data byte lanes contain

valid data on each beat of the data burst, therefore a ‘for loop’ calls the set_write_strobes()

function to set the write_strobes fields of the transaction to 4’b1111 for each beat of the burst.

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Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur Page 167

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