Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur télécharger pdf (Page 312)

Mentor VIP AE AXI3/4 User Guide, V10.2b

VHDL AXI3 and AXI4 Master BFMs

set_data_valid_delay()

September 2013

AXI4 Example

-- Create a write transaction with start address of 0.

-- Creation returns tr_id to identify the transaction.

create_write_transaction(0, tr_id, bfm_index, axi4_tr_if_0(bfm_index));

-- Set the write channel WVALID delay to 3 ACLK cycles for the first data

-- phase (beat) of the tr_id transaction.

set_data_valid_delay(3, 0, tr_id, bfm_index, axi4_tr_if_0(bfm_index));

-- Set the write channel WVALID delay to 2 ACLK cycles for the second data

-- phase (beat) of the tr_id transaction.

set_data_valid_delay(2, 1, tr_id, bfm_index, axi4_tr_if_0(bfm_index));

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Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur Page 312