Altera Stratix III Development Board Manuel d'utilisateur télécharger pdf (Page 65)

Chapter 2: Board Components 2–57

On-Board Memory

May 2013 Altera Corporation Stratix III 3SL150 Development Board

Reference Manual

U15 pin F3 Write data bit 12

QDRII_D12

1.5-V HSTL class I K14

U15 pin G2 Write data bit 13

QDRII_D13

1.5-V HSTL class I G13

U15 pin J3 Write data bit 14

QDRII_D14

1.5-V HSTL class I D10

U15 pin L3 Write data bit 15

QDRII_D15

1.5-V HSTL class I F11

U15 pin M3 Write data bit 16

QDRII_D16

1.5-V HSTL class I F13

U15 pin N2 Write data bit 17

QDRII_D17

1.5-V HSTL class I G12

U15 pin P11 Read data bit 0

QDRII_Q0

1.5-V HSTL class I A3

U15 pin M10 Read data bit 1

QDRII_Q1

1.5-V HSTL class I B4

U15 pin L11 Read data bit 2

QDRII_Q2

1.5-V HSTL class I A4

U15 pin K11 Read data bit 3

QDRII_Q3

1.5-V HSTL class I A5

U15 pin J10 Read data bit 4

QDRII_Q4

1.5-V HSTL class I C6

U15 pin F11 Read data bit 5

QDRII_Q5

1.5-V HSTL class I F8

U15 pin E11 Read data bit 6

QDRII_Q6

1.5-V HSTL class I G9

U15 pin C10 Read data bit 7

QDRII_Q7

1.5-V HSTL class I F9

U15 pin B11 Read data bit 8

QDRII_Q8

1.5-V HSTL class I G10

U15 pin B2 Read data bit 9

QDRII_Q9

1.5-V HSTL class I J12

U15 pin D3 Read data bit 10

QDRII_Q10

1.5-V HSTL class I J11

U15 pin E3 Read data bit 11

QDRII_Q11

1.5-V HSTL class I G8

U15 pin F2 Read data bit 12

QDRII_Q12

1.5-V HSTL class I G11

U15 pin G3 Read data bit 13

QDRII_Q13

1.5-V HSTL class I B2

U15 pin K3 Read data bit 14

QDRII_Q14

1.5-V HSTL class I B5

U15 pin L2 Read data bit 15

QDRII_Q15

1.5-V HSTL class I F6

U15 pin N3 Read data bit 16

QDRII_Q16

1.5-V HSTL class I C5

U15 pin P3 Read data bit 17

QDRII_Q17

1.5-V HSTL class I D6

U15 pin B7 Byte write select bit 0

QDRII_BWSn0

1.5-V HSTL class I C11

U15 pin A5 Byte write select bit 1

QDRII_BWSn1

1.5-V HSTL class I D11

U15 pin A11 Echo clock

QDRII_CQ_N

1.5-V HSTL class I C4

U15 pin A1 Echo clock

QDRII_CQ_P

1.5-V HSTL class I H11

U15 pin A6 Write clock

QDRII_K_N

1.5-V HSTL class I H14

U15 pin B6 Write clock

QDRII_K_P

1.5-V HSTL class I J14

U15 pin R6

On-die termination

pin for future QDRII

devices.

QDRII_ODT

1.5-V HSTL class I C3

U15 pin P6 Valid output indicator

QDRII_QVLD

1.5-V HSTL class I A2

U15 pin A8 Read port select

QDRII_RPSn

1.5-V HSTL class I D17

U15 pin A4 Write port select

QDRII_WPSn

1.5-V HSTL class I K16

Table 2–50. QDRII Interface Pins (Part 2 of 2)

Board Reference Description

Schematic Signal

Name

I/O

Standard

Stratix III

Pin

Number

1 2 ... 60 61 62 63 64 65 66 67 68 69 70 ... 81 82

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