Altera Stratix III Development Board Manuel d'utilisateur télécharger pdf (Page 25)

Chapter 2: Board Components 2–17

Configuration, Status, and Setup Elements

May 2013 Altera Corporation Stratix III 3SL150 Development Board

Reference Manual

Configuration, Status, and Setup Elements

This section describes the board’s configuration, status, and setup elements, and is

divided into the following groups:

■ “Configuration” on page 2–17

■ FPGA programming over USB

■ FPGA programming from flash memory

■ Flash programming over USB

■ “Status Elements” on page 2–19

■ Board-specific LEDs

■ Power display

■ “Setup Elements” on page 2–21

■ JTAG control DIP switch

■ MAX II device control DIP switch

■ System reset and configuration push-button switches

■ Power Select rotary switch

■ PGM Config Select rotary switch

Configuration

This section discusses FPGA, flash memory, and MAX II device programming

methods supported by the Stratix III development board.

FPGA Programming Over USB

You can configure the FPGA at any time the board is powered on using the USB 2.0

interface and the Quartus II Programmer in JTAG mode.

The JTAG chain is mastered by the embedded USB-Blaster function found in the

MAX II device. Only a USB cable is needed to program the Stratix III FPGA. Any

device can be bypassed by using the appropriate switch on the JTAG control DIP

switch.

1 Board reference SW1 position 4 (SW1.4), labeled

MAX_ENABLE

must be in the 0 position

for this feature to work properly.

For more information about:

■ Advanced JTAG settings, refer to Table 2–7.

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 ... 81 82

Pas de commentaire

Altera Stratix III Development Board Manuel d'utilisateur Page 25