Altera Stratix III Development Board Manuel d'utilisateur télécharger pdf (Page 12)

2–4 Chapter 2: Board Components

Featured FPGA (U22)

Stratix III 3SL150 Development Board May 2013 Altera Corporation

Reference Manual

Featured FPGA (U22)

The Stratix III Development Kit features the EP3SL150F1152C2 device (U22) in a

1152-pin BGA package.

f For more information about Stratix III devices, refer to the Stratix III Device Handbook.

Table 2–2 lists the main Stratix III EP3SL150 device features.

Table 2–3 lists the Stratix III device component reference and manufacturing

information.

Table 2–4 lists the Stratix III device EP3SL150F1152 pin count.

U15 QDRII

Burst-of-four, 2M × 18, 400-MHz QDRII memory interface in an FBGA

package.

J19 DDR2 SDRAM DIMM Connector for 1 GByte × 72 DDR2 SDRAM DIMM.

Components and Interfaces

U11 USB device

USB device that provides JTAG programming of on-board devices,

including the Stratix III device and flash memory device.

J14 Ethernet cable jack

The RJ-45 jack is for Ethernet cable connection. The connector is fed

by a 10/100/1000 base T PHY device with an RGMII interface to the

Stratix III device.

J8 and J18 HSMC Port A and Port B HSMC connectors to allow for expansion via the addition of HSMCs.

Power Supply

J21 DC power jack 14–20 V DC power source.

SW4 Input Switches the board’s power on and off.

Table 2–1. Stratix III Development Board (Part 3 of 3)

Board Reference Type Description

Table 2–2. Stratix III EP3SL150 Device Features

ALMs LEs

M9K

Blocks

M144K

Blocks

MLAB

Blocks

Total

Embedded

RAM Kbits

MLAB

Kbits

Total

Memory

Kbits

18 × 18 Bit

Multipliers

PLLs

57 142.5 355 16 2,850 5,499 1,781 7,280 384 8

Table 2–3. Stratix III Device Component Reference and Manufacturing Information

Board Reference Description Manufacturer

Manufacturing

Part Number

Manufacturer

Website

U22 High-speed, low-power FPGA Altera

Corporation EP3SL150F1152 www.altera.com

Table 2–4. Stratix III Device Pin Count (Part 1 of 2)

Function I/O Type I/O Count Special Pins

Oscillators and SMAs 1.8-V CMOS 4 Three clock inputs, one output

DDR2 DIMM 1.8-V SSTL 136 18 data strobe signal (DQS) pins

DDR2 devices 1.8-V SSTL 74 Four DQS pins

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 81 82

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Altera Stratix III Development Board Manuel d'utilisateur Page 12

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