Altera DDR SDRAM Controller Manuel d'utilisateur télécharger pdf (Page 5)

March 2009 Altera Corporation DDR and DDR2 SDRAM Controller Compiler User Guide

1. About This Compiler

Release Information

Table 1–1 provides information about this release of the DDR and DDR2 SDRAM

Controller Compiler.

Device Family Support

MegaCore

functions provide either full or preliminary support for target Altera

device families, as described below:

■ Full support means the MegaCore function meets all functional and timing

requirements for the device family and may be used in production designs

■ Preliminary support means the MegaCore function meets all functional

requirements, but may still be undergoing timing analysis for the device family; it

may be used in production designs with caution

Table 1–2 shows the level of support offered by the DDR and DDR2 SDRAM

Controller Compiler to each of the Altera device families.

Table 1–1. DDR & DDR2 SDRAM Controller Release Information

Item Description

Version 9.0

Release Date March 2009

Ordering Codes IP-SDRAM/DDR (DDR SDRAM)

IP-SDRAM/DDR2 (DDR2 SDRAM)

Product IDs 0055 (DDR SDRAM)

00A7 (DDR2 SDRAM)

00A8 (common library)

Vendor ID 6AF7

Table 1–2. Device Family Support (Part 1 of 2)

Device Family

Support

DDR SDRAM DDR2 SDRAM

Cyclone

Full No support

Cyclone II Full Full

HardCopy

II Preliminary Preliminary

Stratix

Full No support

Stratix GX Full No support

Stratix II (1) Full Full

Stratix II GX Full Full

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Altera DDR SDRAM Controller Manuel d'utilisateur Page 5