Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Manuel d'utilisateur Page 27
- Page / 196
- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
Parameter Type Range Default
Setting
Parameter Description
Set FEC_Enable
bit on power up
or reset
Boolean • True
• False
True
If this parameter is turned on, the IP core sets the
FEC enable bit (40GBASE-KR4 register offset 0xB0,
bit 18: KR FEC request) on power up and reset. If
you turn on this parameter but do not turn on Set
FEC_ability bit on power up or reset, this parameter
has no effect: the IP core cannot specify the value of 1
for FEC Requested without specifying the value of 1
for FEC Ability.
This parameter is available if you turn on Include
FEC sublayer.
Table 2-3: 40-100GbE PHY Parameter Settings
Lists the PHY parameters that are configured automatically based on parameter values you select in the Low
Latency 40G/100G Ethernet parameter editor.
Parameter 40GbE Value
40GBASE-KR4 Value
100GbE Value 100GbE at CAUI–4
Lanes
4 10 4
Data rate per lane
10312.5 Mbps 10312.5 Mbps 25781.25 Mbps
Available PHY
reference clock
frequencies
322.265625 MHz
644.53125 MHz
322.265625 MHz
644.53125 MHz
322.265625 MHz
644.53125 MHz
Related Information
Clocks on page 3-51
The PHY reference frequency value is the required frequency of the transceiver reference clock or
transceiver reference clocks.
Files Generated for Stratix V Variations
The Quartus II software generates the following output for your Stratix V LL 40-100GbE IP core.
UG-01172
2015.05.04
Files Generated for Stratix V Variations
2-13
Getting Started
Altera Corporation
Send Feedback
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- Features 6
- Device Family Support 8
- IP Core Verification 9
- Simulation Environment 10
- Compilation Checking 10
- Hardware Testing 10
- Variation 11
- A B C D E F 11
- Parameter 11
- Release Information 14
- Getting Started 15
- OpenCore Plus IP Evaluation 17
- IP Core Parameters 19
- Parameter Type Range Default 23
- Parameter Description 23
- File Name Description 29
- Pin Assignments 32
- External TX MAC PLL 35
- File Names Description 38
- Initializing the IP Core 45
- Functional Description 46
- High Level System Overview 47
- Address Insertion 49
- Length/Type Field Processing 49
- Frame Padding 50
- Client Interface 51
- Data Bus Width (Bits) 51
- Three unusable words 57
- Order of Transmission 59
- RX CRC Forwarding 63
- Inter-Packet Gap 63
- Pause Ignore 63
- Control Frame Identification 64
- Name Direction Description 65
- Low Latency 100GbE CAUI–4 PHY 72
- External Transceiver PLL 72
- Pause Control Frame Filtering 76
- Statistics Counters Interface 79
- Name Signal 80
- Direction 80
- Description 80
- OctetOK Count Interface 82
- Transparent Clock Mode 85
- PTP Receive Functionality 87
- PTP Transmit Functionality 88
- 1588 PTP Interface Signals 90
- PTP Timestamp Formats 92
- PHY Status Interface 93
- Control and Status Interface 94
- Signal Name Description 97
- UG-01172 100
- 2015.05.04 100
- Related Information 108
- Software Interface: Registers 109
- PHY Registers 112
- LL 40GBASE-KR4 Registers 116
- Pause Registers 130
- TX Statistics Registers 137
- RX Statistics Registers 143
- 1588 PTP Registers 148
- Ethernet Glossary 150
- Term Definition 151
- Altera Corporation 153
- Send Feedback 153
- Arria 10 10GBASE-KR Registers 160
- 0x4D6 to 181
- MAC+PHY KR solution 181
- Subscribe 182
- Additional Information 187
- Date Compatible ACDS 188
- How to Contact Altera 194
- Typographic Conventions 195
- Visual Cue Meaning 196
Produits connexes et manuels pour Instruments de mesure Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore
Instruments de mesure Altera Mentor Verification IP Altera Edition AMBA AXI4-Li Manuel d'utilisateur
(413 pages)
(413 pages)
Instruments de mesure Altera Mentor Verification IP Altera Edition AMBA AXI4-St Manuel d'utilisateur
(231 pages)
(231 pages)
Instruments de mesure Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Manuel d'utilisateur
(783 pages)
(783 pages)
Instruments de mesure Altera PCI Development Kit, Cyclone II Edition Getting St Manuel d'utilisateur
(40 pages)
(40 pages)
Instruments de mesure Altera PCI Express Development Kit, Stratix II GX Edition Manuel d'utilisateur
(36 pages)
(36 pages)
© 2020, manymanuals.fr. Tous droits réservés | 0.023 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commentaires sur ces manuels