Altera Hybrid Memory Cube Controller Manuel d'utilisateur télécharger pdf (Page 46)

Related Information

HMC Specification 1.1

The HMC specification is available for download from the Hybrid Memory Cube Consortium web page.

Signals on the Interface to the I

C Master

Your design must include an I

C master module that drives the HMC device I

C interface for link

initialization. This interface connects to the I

C module.

The I

C module and the IP core together must implement the following four-way handshake with the two

interface signals:

1. Resetting the IP core deasserts the i2c_load_registers signal. Resetting the I

C master module

should deassert the i2c_registers_loaded signal.

2. When the IP core and the HMC are ready, the IP core asserts i2c_load_registers. In simulation, the

IP core assumes the HMC simulation model is ready instantaneously, and in hardware, the IP core

waits the required t

INIT

duration of 20 ms.

3. After the I

C master module detects the assertion of i2c_load_registers, it writes to the HMC

device registers to set them up for link initialization (concluding with Init Continue) and then

asserts the i2c_registers_loaded signal.

4. The HMC Controller IP core deasserts i2c_load_registers.

5. The I

C master module deasserts i2c_registers_loaded.

Table 4-4: Signals on the Interface to the External I

C Master Module

The IP core i2c_load_registers signal behavior conforms to the four-way handshaking protocol. For correct

HMC Controller IP core functionality, you must design the I

C master module in your design to implement

i2c_registers_loaded signal behavior that conforms to this four-way handshaking protocol.

Signal Name Direction Description

i2c_load_registers

Output

Indicates the HMC Controller IP core is ready for the

external I

C master module to load the HMC device

configuration registers, as part of the link initialization

sequence.

You must connect this signal to the I

C master module

input port that accepts requests to load the configuration

registers of the HMC device.

i2c_registers_loaded

Input

Indicates the external HMC device registers are

configured.

You must connect this signal to the output port of the I

master that indicates successful completion of the configu‐

ration register load sequence.

If multiple HMC Controller IP cores are connected to different links of the same HMC device, the

external I

C master must wait until all of the HMC Controller IP cores have asserted their

i2c_load_registers signal, before writing to the HMC device configuration registers. After the external

C master completes writing all of the HMC configuration registers, it must assert the

i2c_registers_loaded signals for all of the HMC Controller IP cores simultaneously.

UG-01152

2015.05.04

Signals on the Interface to the I

C Master

4-9

HMC Controller IP Core Signals

Altera Corporation

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Altera Hybrid Memory Cube Controller Manuel d'utilisateur Page 46

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