Altera Hybrid Memory Cube Controller Manuel d'utilisateur télécharger pdf (Page 4)

About the Altera Hybrid Memory Cube

Controller IP Core

2015.05.04

UG-01152

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The Hybrid Memory Cube (HMC) specification defines a new type of memory device that provides a

significant increase in bandwidth and power efficiency over existing memory architectures. The HMC

specification targets high performance computers and next-generation networking equipment and

provides scalability for a wide range of applications.

The Altera

HMC Controller MegaCore

IP core enables easy access to external HMC devices. HMC

devices provide high bandwidth, reliable access to large amounts of memory with a small form factor, and

provide significant system cost savings in high performance, memory intensive applications. The HMC

Controller IP core provides a simple user interface through which you can communicate with an external

HMC device to incorporate these bandwidth and performance gains in your design.

Figure 1-1: Typical HMC Controller Application

FPGA/

ASIC

HMC Controller

100Gbps Ethernet

MAC

Hybrid Memory Cube

Ethernet

Link

FPGA/

ASIC

HMC Controller

100G Interlaken

Interlaken Link

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trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

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9001:2008

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Altera Hybrid Memory Cube Controller Manuel d'utilisateur Page 4

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