Altera SDI Audio IP Cores Manuel d'utilisateur télécharger pdf (Page 11)

Figure 3-1: SDI Audio Embed IP Core Block Diagram

Avalon-ST Audio to Audio Embed with Avalon Only

FIFO FIFO FIFO FIFO FIFO FIFO FIFO FIFO

Audio

Embedder

SD/HD/3G-SDI SD/HD/3G-SDI

Avalon-MM

Audio Embed or Audio Embed with Avalon

SD/HD Audio Embedder

Packet

Creation

Packet

Distribution

Channel

Status RAM

The SDI Audio Embed IP core embeds up to 16 channels or 8 channel pairs. The input audio can be any of

the sample rates permitted by the SMPTE272M-ABCD and SMPTE299M standards; synchronous to the

video. If you want to embed audio pairs together in a sample audio group, the audio pairs must be synchronous

with each other.

The SDI Audio Embed IP core consists of the following components:

• An encrypted audio embedder core

• A register interface block that provides support for an Avalon-MM control bus

The audio embedder accepts the audio in AES format, and stores each channel pair in an input FIFO buffer.

As the embedder places the audio sample in the FIFO buffer, it also records and stores the video clock phase

information.

When accepting the audio in AES format, the SDI Audio Embed IP core does one of the following operations:

• maintains the channel-status details

• replaces the channel-status details with the default or the RAM versions

SDI Audio Embed Parameters

The following table lists the parameters for the SDI Audio Embed IP core.

SDI Audio IP Functional Description

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UG-SDI-AUD

SDI Audio Embed Parameters

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Altera SDI Audio IP Cores Manuel d'utilisateur Page 11