Altera POS-PHY Level 4 IP Core Manuel d'utilisateur télécharger pdf (Page 35)

Chapter 3: Parameter Settings 3–15

Protocol Parameters

December 2014 Altera Corporation POS-PHY Level 4 IP Core User Guide

For the Training pattern repetition value, the training sequence includes one

IDLE

word, plus

ALPHA(

a) × 20 training words.

ALPHA

is a user-selectable option (0 to 255).

Zero (0) is equal to 256 training pattern repetitions.

The training sequence includes one

IDLE

control word, plus a × 20 words. The twenty

words are separated into ten consecutive

tdat

words of

16’h0FFF

with

tctl

1’b1

followed by ten consecutive

tdat

words of

16’hF000

with

tctl

1’b0

For the Status sync good and Status sync bad threshold values, two 4-bit inputs,

good_level

(

ctl_ts_sync_good_theshold)

and

bad_level

(

ctl_ts_sync_bad_theshold

), are associated with the

stat_ts_sync

signal.

The

stat_ts_sync

signal is asserted high when a

good_level

number of consecutive

status frames are received without frame or DIP-2 errors. The

stat_ts_sync

signal is

deasserted when a

bad_level

number of DIP-2 errors or frame errors have been

received since the last error-free frame.

The FIFO buffer threshold high (FTH) for transmitter variations controls when the

aN_atxdav

signal is asserted and deasserted for the write side of the FIFO buffer. The

aN_atxdav

signal indicates when there is room available to write new data into the

FIFO buffer, and is asserted whenever the remaining space in the buffer is greater than

the FTH value.

This threshold is defined in terms of bytes, with a valid range from N to buffer size

bytes, in N-byte increments, where:

■ N = 4 or 8 bytes for 32-bit data path variations

■ N = 8 or 16 bytes for 64-bit data path variations

■ N = 16 or 32 bytes for 128-bit data path variations

The N-byte values depend on the Atlantic interface width and on the Lite transmitter

setting. Table 3–6 shows the N-byte values, based on the transmitter's settings.

1 Although the parameter editor allows you to set FTH values as low as one FIFO

buffer element (translated to bytes), a minimum FTH value is used internally. And,

depending on the core's configuration, up to four FIFO buffer locations are unusable.

For the exact minimum FTH value and number of unusable locations, refer to the

parameter editor message that appears while configuring the core.

Table 3–6. N-Byte Values

Datapath Width

Atlantic Interface

Width

Lite Transmitter

N Bytes (FTH

Increment)

32 — 4

64 — 8

On 8

Off 16

128 On or off 16

128 128

On 16

Off 32

1 2 ... 30 31 32 33 34 35 36 37 38 39 40 ... 141 142

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Altera POS-PHY Level 4 IP Core Manuel d'utilisateur Page 35

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