Altera ALTDQ_DQS2 Manuel d'utilisateur télécharger pdf (Page 72)

Figure 40:

Hardened in ALTDQ_DQS2 Megafunction.

Read

FIFO

DOUT DIN

REN WREN

Latency

Shifter

FIFO

Data

Valid

FIFO

Data to Core Data from DQ

To DQS Enable

Read Data Enable from Core

Implement as Soft FIFOs

Figure 41:

Note:

The write enable (we) and read enable (re) signals of the hard read FIFO are different from the

wrreq and rdreq signals of the DCFIFO. In DCFIFO, the data is only available at the FIFO output

ports when the rdreq is asserted. For the hard read FIFO, the we signal controls when to advance

Hard Read FIFO

UG-01089

2014.12.17

Altera Corporation

ALTDQ_DQS2 IP Core User Guide

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Altera ALTDQ_DQS2 Manuel d'utilisateur Page 72