Altera MAX 10 Embedded Memory Manuel d'utilisateur télécharger pdf (Page 17)

MAX 10 Embedded Memory Design

Consideration

2015.05.04

UG-M10MEMORY

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There are several considerations that require your attention to ensure the success of your designs.

Implement External Conflict Resolution

In the true dual-port RAM mode, you can perform two write operations to the same memory location.

However, the memory blocks do not have internal conflict resolution circuitry.

To avoid unknown data being written to the address, implement external conflict resolution logic to the

memory block.

Customize Read-During-Write Behavior

Customize the read-during-write behavior of the memory blocks to suit your design requirements.

Figure 3-1: Difference Between the Two Types of Read-during-Write Operations —Same Port and

Mixed Port.

Port A

data in

Port B

data in

Port A

data out

Port B

data out

Mixed-port

data flow

Same-port

data flow

FPGA Device

Related Information

Read-During-Write on page 2-3

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Altera MAX 10 Embedded Memory Manuel d'utilisateur Page 17

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