Altera Internal Memory (RAM and ROM) IP Core Manuel d'utilisateur Page 8
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Figure 2-2: IP Parameter Editors
View IP port
and parameter
details
Apply preset parameters for
specific applications
Specify your IP variation name
and target device
Legacy parameter
editors
Specifying IP Core Parameters and Options
The parameter editor GUI allows you to quickly configure your custom IP variation. You specify IP core
options and parameters in the Quartus II software.
1. In the IP Catalog (Tools > IP Catalog), locate and double-click the name of the IP core to customize.
The parameter editor appears.
2. Specify a top-level name for your custom IP variation. The parameter editor saves the IP variation
settings in a file named <your_ip>.qsys. Click OK.
3. Specify the parameters and options for your IP variation in the parameter editor, including one or
more of the following. Refer to your IP core user guide for information about specific IP core
parameters.
• Optionally select preset parameter values if provided for your IP core. Presets specify initial
parameter values for specific applications.
• Specify parameters defining the IP core functionality, port configurations, and device-specific
features.
• Specify options for processing the IP core files in other EDA tools.
4. Click Generate HDL, the Generation dialog box appears.
5. Specify output file generation options, and then click Generate. The IP variation files generate
according to your specifications.
6. To generate a simulation testbench, click Generate > Generate Testbench System.
UG-01068
2014.12.17
Specifying IP Core Parameters and Options
2-3
Customizing Embedded Memory IP Cores
Altera Corporation
Send Feedback
- User Guide 1
- Contents 2
- Embedded Memory Features 4
- Using the Parameter Editor 7
- Related Information 10
- Memory Block Types 11
- Altera Corporation 12
- Send Feedback 12
- Read Operation 13
- Port Width Configurations 14
- Clocking Modes Description 16
- 2014.12.17 17
- UG-01068 17
- Byte Enable 18
- Asynchronous Clear 20
- Read Enable 20
- Read-During-Write 21
- Error Correction Code 25
- RAM:1-Port IP Core Parameters 31
- Design Example 47
- Option Value 48
- Simulating the Design 50
- Ports Name Ports 51
- Descriptions 51
- Document Revision History 56
- Date Version Changes 57
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