Altera Internal Memory (RAM and ROM) IP Core Manuel d'utilisateur télécharger pdf (Page 38)

Parameter Legal Values Description

More Options

When you select

With one read port

and one write port,

the following option

is available:

• Use clock enable

for write input

registers

When you select

With two read /

write ports, the

following options are

available:

• Use clock enable

for port A input

registers

• Use clock enable

for port B input

registers

• Use clock enable

for port A output

registers

• Use clock enable

for port B output

On/Off

Clock enable for port B input

and output registers are

turned on by default. You

only need to specify whether

to use clock enable for port A

input and output registers.

UG-01068

2014.12.17

RAM: 2-Port IP Core Parameters

4-13

Embedded Memory Signals and Parameters

Altera Corporation

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Altera Internal Memory (RAM and ROM) IP Core Manuel d'utilisateur Page 38