Altera Cyclone V SoC Development Board Manuel d'utilisateur Page 6

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1–2 Chapter 1: Overview
Board Component Blocks
Cyclone V SoC Development Board November 2013 Altera Corporation
Reference Manual
Board Component Blocks
The development board features the following major component blocks:
One Cyclone V SoC (5CSXFC6D6F31C6) in a 896-pin FBGA package
FPGA configuration circuitry
Active Serial (AS) x1 or x4 configuration (EPCQ256SI16N)
MAX
®
V CPLD (5M2210ZF256I5N) in a 256-pin FBGA package as the System
Controller
Flash fast passive parallel (FPP) configuration
MAX II CPLD (EPM570GM100) as part of the embedded USB-Blaster
TM
II for
use with the Quartus
®
II Programmer
Clocking circuitry
Si570, Si571, and Si5338 programmable oscillators
25-MHz, 50-MHz,100-MHz, 125-MHz, 148.50-MHz, and 156.25-MHz
oscillators
SMA input (LVCMOS)
Memory
One 1,024-Mbyte (MB) HPS DDR3 SDRAM with error correction code (ECC)
support
One 1,024-MB FPGA DDR3 SDRAM
One 512-Megabit (Mb) quad serial peripheral interface (QSPI) flash
One 512-Mb CFI flash
One 32-Kb I
2
C serial electrically erasable PROM (EEPROM)
One Micro SD flash memory card
Communication Ports
One PCI Express x4 Gen1 socket
One universal HSMC port
One USB 2.0 on-the-go (OTG) port
One Gigabit Ethernet port
Dual 10/100 Ethernet ports
One SDI port (option for SMA connection)
One controller area network (CAN) port
One RS-232 UART (through the mini-USB port)
One real-time clock
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