Altera Arria V GX FPGA Manuel d'utilisateur télécharger pdf (Page 44)

6–22 Chapter 6: Board Test System

Using the Board Test System

Arria V GX FPGA Development Kit July 2012 Altera Corporation

User Guide

The SMA Tab

The SMA tab (Figure 6–9) allows you perform loopback tests on the SMA port.

The following sections describe the controls on the SMA tab.

Status

The Status control displays the following status information during the loopback test:

■ PLL lock—Shows the PLL locked or unlocked state.

■ Channel lock—Shows the channel locked or unlocked state. When locked, all

lanes are word aligned and channel bonded.

■ Pattern sync—Shows the pattern synced or not synced state. The pattern is

considered synced when the start of the data sequence is detected.

Figure 6–9. The SMA Tab

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Altera Arria V GX FPGA Manuel d'utilisateur Page 44