Altera Arria V GT FPGA Manuel d'utilisateur Page 6
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- Table des matières
- MARQUE LIVRES
- User Guide 1
- Contents 3
- Additional Information 5
- 1. About This Kit 7
- 1–2 Chapter 1: About This Kit 8
- Kit Features 8
- 2. Getting Started 9
- References 10
- 3. Software Installation 11
- <install dir> 13
- <version> 13
- 4. Development Board Setup 15
- Note to: Table 4–1 17
- Note to: Table 4–5 19
- 5. Board Update Portal 21
- 6. Board Test System 23
- Preparing the Board 24
- Running the Board Test System 25
- Using the Board Test System 25
- The System Info Tab 26
- JTAG Chain 27
- The GPIO FPGA 1 Tab 28
- The Flash Tab 29
- The HSMA Tab 31
- Port (FPGA1) 32
- PMA Setting 32
- Data Type 32
- Error Control 33
- Loopback 33
- The SFP/SMA/C2C Tab 34
- The HSMB/FMC Tab 37
- Port (FPGA2) 38
- The SDI/Bull’s Eye Tab 40
- The SMA Tab 43
- The Power Monitor 45
- General Information 46
- Calculating Power 47
- The Clock Control 48
- CFI Flash Memory Map 51
- ./restore.sh r 54
- Info–2 Additional Information 58
- Typographic Conventions 58
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