Altera Arria II GX FPGA Development Board, 6G Edition Manuel d'utilisateur télécharger pdf (Page 4)

Arria II GX FPGA Development Board, 6G Edition Reference Manual © July 2010 Altera Corporation

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Additional Information

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2

1 2 3 4 5 6 7 8 9 ... 61 62

Reference Manual 1
MNL-01056-1.0 2
Contents 3
Additional Information 4
1. Overview 5
Board Component Blocks 6
Chapter 1: Overview 1–3 7
Handling the Board 8
2. Board Components 9
Board Overview 10
Handbook 12
I/O Resources 13
Note to Table 2–4: 14
Note to Table 2–5: 14
Configuration 19
Figure 2–4. JTAG Chain 20
Status Elements 24
Notes to Table 2–9: 24
Setup Elements 25
JTAG Chain Header Switch 26
Clock Circuitry 28
Notes to Table 2–19: 29
EP2AGX260FF35 30
General User Input/Output 31
User-Defined DIP Switches 32
User-Defined LEDs 32
HSMC User-Defined LEDs 33
PCI Express 35
Components and Interfaces 36
10/100/1000 Ethernet 38
High-Speed Mezzanine Cards 39
DDR2 SODIMM 48
Power Distribution System 57
Power Supply 58
Power Measurement 59
Notes to Table 2–49: 60
Note to Table: 61
Typographic Conventions 62

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Altera Arria II GX FPGA Development Board, 6G Edition Manuel d'utilisateur Page 4

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