Altera Arria II GX FPGA Development Board, 6G Edition Manuel d'utilisateur Page 12
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- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
2–4 Chapter 2: Board Components
Featured Device: Arria II GX Device
Arria II GX FPGA Development Board, 6G Edition Reference Manual © July 2010 Altera Corporation
Featured Device: Arria II GX Device
The Arria II GX FPGA development board, 6G Edition features the Arria II GX
EP2AGX260FF35 device (U19) in a 1152-pin FBGA package.
f For more information about Arria II device family, refer to the Arria II GX Device
Handbook.
Memory Devices
J7 DDR2 SODIMM DDR2 x64 SODIMM 200-pin connector and is populated with a
1-Gbyte memory module.
U13 DDR3 x16 memory Independent 16-bit 128-Mbyte DDR3 memory port.
U22 SSRAM x36 memory Standard synchronous RAM which makes a 36-bit 2-Mbyte SRAM
port.
U23 Flash x16 memory Synchronous burst mode flash device which provides a 16-bit
64-Mbyte non-volatile memory port.
Communication Ports
J14 PCI Express edge connector Made of gold-plated edge fingers for up to ×8 signaling in Gen1 mode.
J2 HSMC port A Provides four transceiver channels and 80 CMOS or 17 LVDS channels
per the HSMC specification.
J1 HSMC port B Provides four transceiver channels and 78 CMOS channels per the
HSMC specification (only populated when a EP2AGX260 device is
installed).
J6 USB type-B connector USB interface for programming the FPGA through embedded
USB-Blaster JTAG via a type-B USB cable.
J8 Gigabit Ethernet RJ-45 connector which provides a 10/100/1000 Ethernet connection
via a Marvell 88E1111 PHY and the FPGA-based Altera Triple Speed
Ethernet MegaCore function in RGMII mode.
Display Ports
J3 Character LCD Connector which interfaces to the provided 16 character × 2 line LCD
module along with two standoffs at MTH7 and MTH8.
Power Supply
J14 PCI Express edge connector Interfaces to a PCI Express root port such as an appropriate PC
motherboard.
J4 DC input jack Accepts a 14-V – 20-V DC power supply. This input jack is not to be
used while the board is plugged into a PCI Express slot.
SW1 Power switch Switch to power on or off the board when power is supplied from the
DC input jack.
Table 2–1. Arria II GX FPGA Development Board, 6G Edition Components (Part 3 of 3)
Board Reference Type Description
- Reference Manual 1
- MNL-01056-1.0 2
- Contents 3
- Additional Information 4
- 1. Overview 5
- Board Component Blocks 6
- Chapter 1: Overview 1–3 7
- Handling the Board 8
- 2. Board Components 9
- Board Overview 10
- Handbook 12
- I/O Resources 13
- Note to Table 2–4: 14
- Note to Table 2–5: 14
- Configuration 19
- Figure 2–4. JTAG Chain 20
- Status Elements 24
- Notes to Table 2–9: 24
- Setup Elements 25
- JTAG Chain Header Switch 26
- Clock Circuitry 28
- Notes to Table 2–19: 29
- EP2AGX260FF35 30
- General User Input/Output 31
- User-Defined DIP Switches 32
- User-Defined LEDs 32
- HSMC User-Defined LEDs 33
- PCI Express 35
- Components and Interfaces 36
- 10/100/1000 Ethernet 38
- High-Speed Mezzanine Cards 39
- DDR2 SODIMM 48
- Power Distribution System 57
- Power Supply 58
- Power Measurement 59
- Notes to Table 2–49: 60
- Note to Table: 61
- Typographic Conventions 62
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