Altera Stratix GX Guide de l'utilisateur Page 227

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Altera Corporation 9–1
January 2005
9. Reset Control &
Power Down
Introduction
Stratix
®
GX transceivers offer multiple reset signals to control separate
ports of the transceiver channels and transceiver blocks, as shown in
Figure 9–1. The Quartus
®
II software sets each unused channel to a
power-down mode to reduce power consumption.
Figure 9–1. Reset Control Diagram
Power On Reset
(POR)
At power on, the Stratix GX transceiver uses built-in circuits that handle
the reset of the digital and analog circuits. After power on reset (POR), the
Stratix GX block is guaranteed to be in a known state.
USER Reset &
Enable Signals
Each transceiver block and channel in the Stratix GX transceiver block has
individual reset signals to reset the digital and analog portions of the
channel. The txdigitalreset, rxdigitalreset, and
rxanalogreset signals affect the channels individually. The
pll_areset and pllenable signals affect the entire transceiver block.
The pll_areset signal is a power-down signal and powers down the
entire transceiver block. The analog circuitry is powered down when the
pll_areset signal goes high. Although there is no specific requirement
on the duration of the pll_areset signal, Altera
®
lab experiments have
shown that 1 ms is a safe value. If you use the pll_areset signal to
power down the analog circuitry, Altera recommends that you use the
pll_locked and rx_freqlocked signals from the transceiver block to
implement your reset logic.
Reset
Control
txdigitalreset
rxdigitalreset
rxanalogreset
pll_areset
pllenable
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