Altera Virtual JTAG IP Core Manuel d'utilisateur télécharger pdf (Page 39)

Figure 19: Read Side Logic for DCFIFO Design Example

IR Decode/State

Decode Logic

IR_register

State

Information

TDO

Write_req

Data[7:0]

Write_clock

Read_req

Read_clock

Q[7:0]

Rd_empty

Data_out

VJI Instance

Virtual DR

(Push_out)

SignalTap II

Embedded Logic

Analyzer

Runtime Communication

The Tcl script, dc_fifo_vji.tcl, contains three procedures, each corresponding to one of the virtual JTAG

instructions. The table below describes each of the procedures.

Table 17: Run-Time Communication Tcl Procedures

DescriptionProcedure

IR shift the PUSH instruction, followed by a DR shift of the value

argument. Value must be an integer less than 256.

push [value]

IR shift the POP instruction, followed by a DR shift of 8 bits.pop

IR shift the FLUSH instruction.flushfifo

The figure below shows runtime execution of eight values pushed into the DCFIFO and a flushfifo

command, and a SignalTap II Logic Analyzer capture triggering on a flush operation.

Altera Corporation

Virtual JTAG Megafunction (sld_virtual_jtag)

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Runtime Communication

UG-SLDVRTL

2014.03.19

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Altera Virtual JTAG IP Core Manuel d'utilisateur Page 39