Altera Nios II C2H Compiler Manuel d'utilisateur Page 56

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3–16 9.1 Altera Corporation
Nios II C2H Compiler User Guide November 2009
Memory Accesses
behavior of a C function accessing memory is the same, regardless of
whether the function is implemented as hardware logic or software
instructions.
f For more information on SOPC Builder, Avalon interfaces, and how
SOPC Builder generates system interconnect fabric, refer to the
Quartus II Handbook, volume 4: SOPC Builder and the Avalon Memory-
Mapped Interface Specification.
In order to maximize bandwidth, the C2H Compiler creates a master port
on the accelerator for every C operator that accesses external memory.
Multiple master ports allow the accelerator to read and write data to an
unlimited number of locations simultaneously, thereby reducing the
bandwidth limitations inherent in a CPU with a single data master port.
In some cases, the C2H Compiler can determine that master ports can be
shared between several external memory operations without sacrificing
performance. However, as a general rule, an Avalon-MM master port is
created for each of the following:
Pointer dereference (* operator)
Index into an array ([ operator)
Index into a struct or union (. or -> operator)
Usage of a global or static variable
Example 3–8 demonstrates various lines of code that generate a master
port in hardware.
Example 3–8. C Statements that Generate Avalon-MM master ports
*my_ptr = 8;
data_in = *src;
dst[index] = data_out;
pixel = pixel_array[i][j];
buffer.input = 0x80000400;
current = s->next;
The following sections describe each case in detail.
Indirection Operator (Pointer Dereference)
The indirection operator (*) is the fundamental expression of
dereferencing and indirection. This section describes how the
C2H Compiler handles pointer dereferencing.
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