Altera Avalon Verification IP Suite Manuel d'utilisateur télécharger pdf (Page 102)

3–2 Chapter 3: Avalon-ST Sink BFM

Functional Description

Avalon Verification IP Suite User Guide May 2011 Altera Corporation

Functional Description

This section provides a functional description of the Avalon-ST Sink BFM. It includes

the following topics:

■ “Timing” on page 3–2

■ “Block Diagram” on page 3–3

Timing

The timing diagram shown in Figure 3–2 illustrates the timing for an Avalon-ST Sink

BFM signalling when it is ready to receive data from an Avalon-ST source. In the first

instance, the sink is not ready when the source has data. In the second instance, the

sink is ready but the source does not initially have valid data.

Table 3–1 describes the annotations used in Figure 3–2.

Figure 3–2. Avalon-ST Source and Sink Timing

CLK

ready

valid

data

D1 D2

snk_rdya

snk_rdyd

snk_rdya

idle

Table 3–1. Key to Annotations in Figure 3–2

Symbol Description

idle

The idle time between transactions. This time is reported by the command

get_transaction_idles

snk_rdya

Signals the sink has asserted

ready

. The event name is

signal_snk_ready_assert

Signals the transaction has been received and queued. The event name is

signal_transaction_received

snk_rdyd

Signals the sink is not

ready

. The event name is

signal_snk_ready_deassert

1 2 ... 97 98 99 100 101 102 103 104 105 106 107 ... 177 178

Pas de commentaire

Altera Avalon Verification IP Suite Manuel d'utilisateur Page 102