Altera 100G Interlaken MegaCore Function Manuel d'utilisateur Page 4
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Noté. / 5. Basé sur avis des utilisateurs
External Loopback Mode............................................................................................................................8-2
PRBS Generation and Validation.............................................................................................................. 8-2
Setting up PRBS Mode in Arria V and Stratix V Devices.......................................................... 8-2
Setting up PRBS Mode in Arria 10 Devices..................................................................................8-4
CRC32 Error Injection ...............................................................................................................................8-7
CRC24 Error Injection................................................................................................................................8-8
Advanced Parameter Settings............................................................................. 9-1
Hidden Parameters......................................................................................................................................9-1
Include Temp Sense.........................................................................................................................9-1
RXFIFO Address Width..................................................................................................................9-2
SWAP_TX_LANES and SWAP_RX_LANES (Data Word Lane Swapping)..........................9-2
Modifying Hidden Parameter Values.......................................................................................................9-3
Out-of-Band Flow Control in the 100G Interlaken MegaCore Function........10-1
Out-of-Band Flow Control Block Clocks...............................................................................................10-2
TX Out-of-Band Flow Control Signals...................................................................................................10-2
RX Out-of-Band Flow Control Signals...................................................................................................10-4
Performance and Fmax Requirements for 100G Ethernet Traffic....................A-1
Additional Information......................................................................................B-1
Document Revision History...................................................................................................................... B-1
How to Contact Altera................................................................................................................................B-5
Typographic Conventions..........................................................................................................................B-5
TOC-4
About This MegaCore Function
Altera Corporation
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- About This MegaCore Function 3
- Device Family Support 6
- IP Core Verification 7
- Device Speed Grade Support 9
- Release Information 9
- Altera IP Core Release Notes 10
- OpenCore Plus IP Evaluation 11
- - HDL synthesis file 13
- 10 variation 14
- Pin Assignments 16
- Adding the External PLL 22
- 100G Interlaken IP Core 23
- Number of Lanes 25
- Meta Frame Length in Words 26
- Data Rate 26
- Enable M20K ECC Support 28
- Include Diagnostic Features 28
- Number of Calendar Pages 29
- TX Scrambler Seed 29
- Transfer Mode Selection 30
- Data Format 30
- Functional Description 31
- Management Interface 32
- High Level Block Diagram 34
- IP Core Reset 35
- Interleaved and Packet Modes 37
- Dual Segment Mode 38
- M20K ECC Support 40
- Device Dependent Signals 72
- Offset Name R/W Description 76
- Example Design 82
- Top Testbench 82
- Testbench Simulation Behavior 83
- Simulating the Example Design 84
- Internal Serial Loopback Mode 86
- External Loopback Mode 87
- CRC32 Error Injection 92
- CRC24 Error Injection 93
- Advanced Parameter Settings 94
- RXFIFO Address Width 95
- Subscribe 98
- UG-01128 100
- 2015.05.04 100
- Signal Name Direction Width 102
- Description 102
- Related Information 102
- Ethernet Traffic 103
- Altera Corporation 105
- Send Feedback 105
- Additional Information 106
- Date ACDS 107
- Changes Made 107
- How to Contact Altera 110
- Typographic Conventions 110
- Visual Cue Meaning 111
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