Altera DE2-115 Guide de l'utilisateur télécharger pdf (Page 62)

SFSU - Embedded Systems Tutorial Nano- Electronics & Computing Research Lab

Step 3c: Click on Generate.

Step 3(d): After you generate the system. Following code is generated:

system (

// 1) global signals:

.clk_0(),

.clocks_VGA_CLK_40_out(),

.clocks_VGA_CLK_out(),

.clocks_sys_clk_out(),

.reset_n(),

// the_SW

.in_port_to_the_SW(),

// the_video_vga_controller

.VGA_BLANK_from_the_video_vga_controller(),

.VGA_B_from_the_video_vga_controller(),

.VGA_CLK_from_the_video_vga_controller(),

.VGA_DATA_EN_from_the_video_vga_controller(),

.VGA_G_from_the_video_vga_controller(),

.VGA_HS_from_the_video_vga_controller(),

.VGA_R_from_the_video_vga_controller(),

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Altera DE2-115 Guide de l'utilisateur Page 62