Altera Transceiver Signal Integrity Development Kit, Stra Manuel d'utilisateur télécharger pdf (Page 4)

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Transceiver Signal Integrity Development Kit May 2014 Altera Corporation

Stratix V GT Edition Reference Manual

Board Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2

1 2 3 4 5 6 7 8 9 ... 51 52

101 Innovation Drive 1
San Jose, CA 95134 1
MNL-01068-1.2 1
Contents 3
1. Overview 5
1–2 Chapter 1: Overview 6
Board Component Blocks 6
Chapter 1: Overview 1–3 7
Handling the Board 8
2. Board Components 9
Board Overview 10
I/O Resources 14
MAX II CPLD System Controller 17
Configuration 22
Installed 1 User image 23
JTAG Header 25
Status Elements 26
Status LEDs 26
Setup Elements 27
Program Select Jumper 28
Reset Push Button 28
CPU Reset Push Button 28
Clock Circuitry 29
General-Purpose Clocks 30
Embedded USB-Blaster Clocks 31
Transceiver Channels 32
Backplane Connectors 33
User-Defined Push Buttons 36
User-Defined DIP Switch 37
User-Defined LEDs 37
Character LCD 38
General User Input/Output 39
10/100/1000 Ethernet 40
Components and Interfaces 41
Transceiver Interfaces 42
XFP Interface 42
SFP+ Interface 43
Flash Memory 44
Power Supply 45
Power Measurement 47
Power Distribution System 48
Temperature Sense 49
Notes to Table 2–45: 50
Additional Information 51
Typographic Conventions 52

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Altera Transceiver Signal Integrity Development Kit, Stra Manuel d'utilisateur Page 4

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