Altera Stratix IV E FPGA Manuel d'utilisateur Page 10
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- Table des matières
- MARQUE LIVRES
- User Guide 1
- Contents 3
- Additional Information 5
- 1. About This Kit 7
- Software 8
- Chapter 1: About This Kit 1–3 9
- 1–4 Chapter 1: About This Kit 10
- Kit Features 10
- 2. Getting Started 11
- References 12
- 3. Software Installation 13
- <install dir> 15
- <version> 15
- 4. Development Board Setup 17
- 12345678 18
- 5. Board Update Portal 25
- 6. Board Test System 27
- Preparing the Board 29
- Running the Board Test System 29
- Using the Board Test System 30
- The Config Tab 31
- JTAG Chain 32
- SOPC Builder Memory Map 32
- The GPIO Tab 33
- The Flash Tab 35
- The SSRAM Tab 37
- Random Test 38
- Increment Test 38
- The DDR3 Tab 39
- Error Control 40
- Data Type 40
- Read and Write Control 40
- The QDRII+ Tab 41
- The RLDRAMII Tab 43
- The HSMC Tab 45
- The Power Monitor 47
- General Information 48
- Calculating Power 50
- CFI Flash Memory Map 51
- 2020000 52
- Chapter : A–3 53
- ./restore.sh r 54
- Chapter : A–5 55
- A–6 Chapter : 56
- Info–2 Additional Information 58
- Typographic Conventions 58
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