Altera Stratix II EP2S180 DSP Development Board Manuel d'utilisateur télécharger pdf (Page 21)

Altera Corporation Core Version a.b.c variable 2–13

Stratix II EP2S180 DSP Development Board Reference Manual

Board Components & Interfaces

Table 2–6 describes the features of the Stratix II EP2S180F1020C3 device.

Switch Inputs

The board has four push-button switches for user-defined logic input.

Each push-button signal, when pressed drives logic low, and when

released resumes driving logic high.

Table 2–6. Stratix II EP2S180 Features

Feature

ALMs 71,760

Adaptive look-up tables (ALUTs) (1) 143,520

Equivalent LEs (2) 179,400

M512 RAM blocks 930

M4K RAM blocks 768

M-RAM blocks 9

Total RAM bits 9,383,040

DSP blocks 96

18-bit × 18-bit multipliers (3) 384

Enhanced PLLs 4

Fast PLLs 8

Maximum user I/O pins 742

Package type 1020-pin FineLine BGA

Board reference U15

Voltage 1.2-V internal, 3.3-V I/O

Notes to Ta b le 2 – 6:

(1) One ALM contains two ALUTs. The ALUT is the cell used in the Quartus II

software for logic synthesis.

(2) This is the equivalent number of LEs in a Stratix device (four-input LUT-based

architecture).

(3) These multipliers are implemented using the DSP blocks.

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 57 58

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Altera Stratix II EP2S180 DSP Development Board Manuel d'utilisateur Page 21