Altera SoC Embedded Design Suite Manuel d'utilisateur télécharger pdf (Page 116)

6. In SignalTap II, on the JTAG Chain Configuration > Device, select the FPGA device.

Figure 4-72: Select FPGA device

7. In SignalTap II, under SOF Manager, click the Browse "…" button, browse to the file <SoC EDS Installa‐

tion directory>/examples/hardware/cv_soc_devkit_ghrd/output_files/soc_system.sof and click Open.

Figure 4-73: Browse Program Files

8. In Signal Tap II, under SOF Manager, click the Program button to program the FPGA.

Figure 4-74: Program FPGA

9. After the FPGA is programmed, the SignalTap II will be ready to acquire:

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Cross-triggering Prerequisites

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Altera SoC Embedded Design Suite Manuel d'utilisateur Page 116