Altera Nios II Embedded Evaluation Kit Cyclone III Editio Manuel d'utilisateur Page 21

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Altera Corporation Development Board Version 1.0. 2–1
July 2010 Preliminary
2. Development Board Setup
Features
The Nios II Embedded Evaluation Kit features:
Cyclone III Starter Board
Cyclone III EP3C25F324 FPGA
Configuration
Embedded USB-Blaster™ circuitry (includes an Altera
EPM3128A CPLD) allowing download of FPGA
configuration files via the users USB port
Power and analog devices from Linear Technology
Memory
256-Mbit DDR SDRAM
1-Mbyte Synchronous SRAM
16-Mbytes Intel P30/P33 flash
Clocking
50-MHz on-board oscillator
Switches and indicators
Six push buttons total, 4 user controlled
Four user-controlled LEDs
LCD Daughtercard
LCD Touch-screen Display
800 X 480 pixel size
10-bit VGA DAC
Video Decoder
24-bit Audio Codec
RS232 transceiver
SD Flash
10/100 Mbps Ethernet Controller (PHY)
Connectors
VGA Output
Composite Video in
Serial connector (RS-232 DB9 port)
PS/2
Ethernet Connector (RJ 45)
SD Card Socket
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