Altera CRC Compiler Manuel d'utilisateur télécharger pdf (Page 6)

1–2 Chapter 1: About This Compiler

Features

CRC Compiler User Guide © November 2009 Altera Corporation

Preliminary

Features

The following list summarizes the features of the CRC Compiler:

■ Highly parameterized Cyclic Redundancy Check (CRC) generator and checker

■ CRC-32, CRC-16-ANSI, and CRC-16-CCITT generator polynomials

■ High-speed operation, over 250 MHz for many configurations

■ Configurable input datapath width from 1 to 256 bits (power-of-two)

■ Configurable CRC starting value

■ Built-in support for the following:

■ Inverting output data

■ Reversing input and output data

■ Partial first word

■ Multi-channel operation

■ Avalon

Streaming (Avalon-ST) interface without backpressure for

message/codeword bits

■ Support for all possible end-of-packet byte residues

■ Verilog and VHDL demonstration testbenches

■ Easy-to-use MegaWizard

™

interface

■ IP functional simulation models for use in Altera-supported VHDL and Verilog

HDL simulators

■ Support for OpenCore Plus evaluation

HardCopy Stratix

Full

Stratix Full

Stratix GX Full

Stratix II Full

Stratix II GX Full

Stratix III Full

Stratix IV Preliminary

Other device families No support

Table 1–2. Device Family Support (Part 2 of 2)

Device Family Support

1 2 3 4 5 6 7 8 9 10 11 ... 29 30

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Altera CRC Compiler Manuel d'utilisateur Page 6