Altera 100G Development Kit, Stratix IV GT Edition Manuel d'utilisateur télécharger pdf (Page 17)

Chapter 2: Board Components 2–9

Featured Device: Stratix IV GT Device

September 2010 Altera Corporation 100G Development Kit, Stratix IV GT Edition Reference Manual

QSFP_MOD_SELn 2.5-V CMOS output 1 QSFP module select

QSFP_RSTn 2.5-V CMOS output 1 QSFP reset

QSFP_SCL 2.5-V CMOS output 1 QSFP serial 2-wire clock

QSFP_SDA 2.5-V CMOS bidirectional 1 QSFP serial 2-wire data

QSFP_INTERRUPT 2.5-V CMOS input 1 QSFP interrupt

QSFP_MOD_PRSn 2.5-V CMOS input 1 QSFP module present

QSFP_LP_MODE 2.5-V CMOS output 1 QSFP low power mode

SFP+ (Two each)

SFP_RX_P/_N Transceiver Channel 4 SFP+ receive channel

SFP_TX_P/_N Transceiver Channel 4 SFP+ transmit channel

SFP_TXDISABLE 2.5-V CMOS output 2 SFP+ transmitter disable

SFP_RATESEL[1:0] 2.5-V CMOS output 4 SFP+ rate select

SFP_MOD_ABS 2.5-V CMOS input 2 SFP+ module absent

SFP_SCL 2.5-V CMOS output 2 SFP+ serial 2-wire clock

SFP_SDA 2.5-V CMOS bidirectional 2 SFP+ serial 2-wire data

SFP_TXFAULT 2.5-V CMOS input 2 SFP+ transmitter fault

SFP_LOS 2.5-V CMOS input 2 SFP+ loss of signal

EDC

EDC_MDC 2.5-V CMOS output 1 EDC management data I/O clock

EDC_MDIO 2.5-V CMOS bidirectional 1 EDC management data I/O data

EDC_GPIO[1:0] 2.5-V CMOS input 2 EDC general purpose I/O

EDC_RESETn 2.5-V CMOS output 1 EDC reset

CFP

CFP_RX_P/_N[9:0] Transceiver Channel 20 CFP receive channel

CFP_TX_P/_N[9:0] Transceiver Channel 20 CFP transmit channel

CFP_PRG_CNTL[3:1] 2.5-V CMOS input 3 CFP programmable control I/O

CFP_PRTADR[4:0] 2.5-V CMOS output 5 CFP MDIO port address

CFP_MDC 2.5-V CMOS output 1 CFP management data I/O clock

CFP_MDIO 2.5-V CMOS bidirectional 1 CFP management data I/O data

CFP_MOD_RST 2.5-V CMOS output 1 CFP module reset

CFP_TX_DIS 2.5-V CMOS output 1 CFP transmitter disable

CFP_RX_LOS 2.5-V CMOS input 1 CFP loss of signal

CFP_PRG_ALRM[3:1] 2.5-V CMOS input 3 CFP programmable alarm

CFP_GLB_ALRM 2.5-V CMOS input 1 CFP global alarm

CFP_MOD_LOPWR 2.5-V CMOS output 1 CFP low power mode

CFP_MOD_ABS 2.5-V CMOS input 1 CFP module absent

Interlaken

INT_RX_P/_N[19:0] Transceiver channel 40 Interlaken receive channel

Table 2–4. Stratix IV GT I/O Usage Summary (Part 3 of 5)

Function I/O Type I/O Count Description

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 79 80

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Altera 100G Development Kit, Stratix IV GT Edition Manuel d'utilisateur Page 17

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